Performance Verification Engineer

  • Position Type: Full Time
  • Location: Santa Clara, CA/ Austin, TX

Required Skills and Experience

  • Strong SV/UVM Knowledge and Coding Skills
  • Experience constructing RTL sim and emulation performance measurement and analysis facilities
  • Understanding of system use-case performance test case construction
  • Experience with standard CPU and system benchmarks¬†
  • A good understanding of the complete verification life cycle (test plan, testbench through coverage closure)
  • Extensive knowledge in multiple testbench structures
  • Knowledge of FPGA and emulation platforms
  • Proficiency in UVM
  • PCIe/CXL support and compliance
  • Knowledge of assertion-based formal verification
  • Domain knowledge in one or more of these areas: fabric, memory controller, encryption, caches, coherence, MMU, high speed interfaces/protocols

 

Roles and Responsibilities

  • Define verification architecture, develop test plans and build verification environment
  • Work with design team to understand design intent and bring up verification plans and schedules
  • Verify SoC using advanced verification methodologies
  • Build agents and checkers from scratch
  • PCIe Full stack knowledge, UVM/SV
  • Perform and write test plan from design architecture specs and/or protocol standard
  • Debug test cases and report verification result to achieve expected code/functional coverage goal
  • Assist in emulation, FPGA, prototyping efforts
  • Assist in silicon bring-up, debug and characterization