Senior ASIC/FPGA Verification Engineer

  • Position Type: Contract 12 months
  • Location: El Segundo, CA 

  Education: All candidates MUST hold a Bachelor’s degree (or higher) in Engineering. Experience: 14+ Years   JOB DESCRIPTION   Required Qualifications   Minimum of 14 years experience in Digital ASIC verification with at least 5 years focused on UVM Experience with ASIC development including architectural definition, and detailed design implementation and functional verification using […]

RTL Design Engineer

  • Position Type: Fulltime
  • Location: Currently remote After COVID Austin, TX

  Required Skills and Experience:  Should be able to work on digital Asic specs and architecture. At Asic RTL design, and digital front-end work (synthesis, STA, linting, ATPG, LEC, timing closure with P&R, etc.). Should have recently worked on Asic digital design and some verification to produce high quality RTL. Background in Point of load […]

SoC Verification Engineer

  • Position Type: SoC Verification Engineer
  • Location: San Diego, CA/ Remote

Job type: Contract Experience: 10+ years Required Skills and Experience:  Writing c test for ARM processor Verilog/VHDL AXI AHB   Preferred Skills and Experience: UVM Writing verification plan Functional coverage Linting CDC   Description:  Client is a wireless IOT company. Looking for help to finish a project. Client is looking for ARM-based SOC verification and […]

Emulation Engineer

  • Position Type: Emulation Engineer
  • Location: Bay Area, CA

Design – Emulation & FPGA Engineer Job Location: Santa Clara, CA / Austin, TX ( After COVID) Currently Remote BA/BS/MS degree in Electrical Engineering Or Equivalent Experience: 10+ years  Job Type: Fulltime   Required Skills and Experience: Experience in FPGA and emulator flows and methodologies Experience in Verilog and SystemVerilog Emulator platforms (Cadence Palladium), platform […]

Asic Design Engineer

  • Position Type: Asic Design Engineer
  • Location: Los Angeles, CA

Job Location: Los Angeles, CA (Onsite Job) Job Type: Fulltime Description: ASIC Design engineer have also done Verification Packaging ASIC Design RTL ASIC designer experience to integrate to back end ASIC designer need to convert FPGA to chip format Functional Verification Screening questions How many years of RTL ASIC design experience do you have? How […]

UVM Verification Engineer

  • Position Type: Contract
  • Location: Remote

Write Verification and test plans Must have Power Management Controller Or Power Regulator experience  Implement testbench and verification components using UVM 5+ years experience as a Verification Engineer Experience with executable test plans and Coverage Driven verification Experience in scripting language Created sequences of PMBus commands Write and augment existing test plans. Implement testbench and […]

Compiler Developer

  • Position Type: Fulltime
  • Location: Los Angeles/Remote

  Required Skills and Experience:  Experience in compiler development EDA tool development experience Custom hardware software co-design experience Adept at working within a large code base Strong computer architecture background Comfortable with tools for compilation and synthesis including Make and Tcl Ability to work independently, take initiative, and communicate effectively Strong software engineering skills Experience […]

UVM Verification Engineer

  • Position Type: Contract
  • Location: San Fransisco/Remote

Verification Engineer Job Location: San Francisco, CA / Remote Job type: Contract  Experience: 10+ years   Required Skills and Experience: Verification env building using UVM / SystemVerilog Test Bench, Scoreboard, Checking, etc SOC verification Build Test Benches Verify using C based flow Integrate VIPs Protocol knowledge AXI, PCIe, DDR, Ethernet, Mipi

SoC Integration Verification Engineer

  • Position Type: Full Time
  • Location: Santa Clara, CA / Austin, TX

Required SKills and Qualifications: Strong fundamentals in digital ASIC verification; experience using Verilog or VHDL and Knowledge of PCIe Full Stack Strong programmable language experience is required (one or more of Verilog, SystemVerilog, Perl, Python, Tcl Scripts, Makefile and/or C++) A good understanding of the complete verification life cycle (test plan, testbench through coverage closure) […]

Performance Verification Engineer

  • Position Type: Full Time
  • Location: Santa Clara, CA/ Austin, TX

Required Skills and Experience Strong SV/UVM Knowledge and Coding Skills Experience constructing RTL sim and emulation performance measurement and analysis facilities Understanding of system use-case performance test case construction Experience with standard CPU and system benchmarks  A good understanding of the complete verification life cycle (test plan, testbench through coverage closure) Extensive knowledge in multiple […]